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15 - 19 September 2008

Conference Handbook

ESSDERC Conference Handbook
ESSCIRC Conference Handbook

Plenary Sessions

ESSCIRC and ESSDERC share Plenary Sessions where distinguished invited speakers will discuss issues of interest for the attendees of both conferences. In addition, ESSDERC will include prominent invited speakers who will address issues of specific interest to the device and fabrication community. The full list of speakers and their titles will be published here by May 2008.

Joint Plenaries

Nanotechnology for Future High-Speed and Energy-Efficient CMOS Applications
R Chau, Intel Corporation, USA
Technology Interfacing for Fabless Semiconductor Companies

V Manian, Broadcom, USA
Solving Issues of Integrated Circuits by 3D-Stacking: Meeting with the era of power, integrity attackers and NRE explosion and a bit of future
T Sakurai, University of Tokyo, Japan
Printed electronics for low-cost electronic systems: technology status and application development

V Subramanian, University of California, USA
More than Moore and More Moore in Europe
M Thompson, ST Microelectronics, France
Micropower energy Scavenging
C van Hoof, IMEC, Belgium

ESSDERC Plenaries

The Future of High-Performance CMOS: Trends and Requirements
D Antoniadis, MIT, USA
Overview and Future Challenges of Floating Body RAM (FBRAM) Technology for 32nm Technology node and Beyond
T Hamamoto, Toshiba, Japan
High Mobility Ge and III-V Materials and Novel Device Structures for High Performance Nanoscale MOSFETS

T Krishnamohan, Stanford University, USA

ESSDERC Programme

View the session schedule in list format
View the session schedule in graphics format